- 专利标题: Bit-interleaver for an optical line terminal
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申请号: US14409421申请日: 2013-07-23
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公开(公告)号: US09706272B2公开(公告)日: 2017-07-11
- 发明人: Arnaud Dupas , Roger Boislaigue
- 申请人: Alcatel Lucent
- 申请人地址: FR Boulogne-Billancourt
- 专利权人: Alcatel Lucent
- 当前专利权人: Alcatel Lucent
- 当前专利权人地址: FR Boulogne-Billancourt
- 代理机构: Harness, Dickey & Pierce, P.L.C.
- 优先权: EP12305947 20120801
- 国际申请: PCT/EP2013/065455 WO 20130723
- 国际公布: WO2014/019881 WO 20140206
- 主分类号: H04Q11/00
- IPC分类号: H04Q11/00 ; H04L1/00 ; H03M13/27 ; H03M13/00
摘要:
Proposed is a bit-interleaver for an optical line terminal of an optical access network. The bit-interleaver contains a memory reader, that provides data streams at bit level to a space-time switch. The space-time switch reads within one input cycle up to N bit sets from the data streams. The switch switches within one writing cycle up to N bits onto up to its output ports, which provide respective output vectors. A number of N OR-function elements determine within the writing cycle respective single output bits. A number of N memory elements write within the one writing cycle a respective one of the output bits into a respective one of their bit sub-elements. A control unit that controls the reading of the data streams and also the switching of the bits by the switch. The control unit controls a choice of the writing addresses.
公开/授权文献
- US20150172793A1 BIT-INTERLEAVER FOR AN OPTICAL LINE TERMINAL 公开/授权日:2015-06-18
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