Invention Grant
- Patent Title: Dynamic biasing circuits for low drop out (LDO) regulators
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Application No.: US14930906Application Date: 2015-11-03
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Publication No.: US09710002B2Publication Date: 2017-07-18
- Inventor: Sri Navaneethakrishnan Easwaran , Vijayalakshmi Devarajan
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: G05F1/56
- IPC: G05F1/56 ; G05F1/575 ; G05F1/46

Abstract:
Dynamic biasing circuits for low drop out (LDO) regulators are described. In some embodiments, an electronic circuit may include a low drop out (LDO) regulator; and a biasing circuit coupled to the LDO regulator, the biasing circuit configured to: monitor a first electrical current and a second electrical current; select a greater of the first or second electrical currents; and provide the selected electrical current to the LDO regulator. In other embodiments, a method may include: providing a digital core and a low drop out (LDO) regulator coupled to the digital core, wherein the digital core is configured to operate in an active mode and in a standby mode; monitoring, via a current selector circuit coupled to the LDO regulator, a first current and a second current; selecting a greater of the first or second electrical currents; and providing the selected current as a biasing current to the LDO regulator.
Public/Granted literature
- US20160349774A1 DYNAMIC BIASING CIRCUITS FOR LOW DROP OUT (LDO) REGULATORS Public/Granted day:2016-12-01
Information query
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