Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US14886088Application Date: 2015-10-18
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Publication No.: US09711377B2Publication Date: 2017-07-18
- Inventor: Toshihiko Akiba , Hiromi Shigihara , Kei Yajima
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2014-227329 20141107
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L23/31 ; H01L23/538 ; H01L23/00 ; H01L23/498 ; H01L23/525

Abstract:
Provided is a semiconductor device with improved reliability that achieves the reduction in size. A semiconductor wafer is provided that has a first insulating member with an opening that exposes from which an upper surface of an electrode pad. Subsequently, after forming a second insulating member over a main surface of the semiconductor wafer, another opening is formed to expose the upper surface of the electrode pad. Then, a probe needle is brought into contact with the electrode pad, to write data in a memory circuit at the main surface of the semiconductor wafer. After covering the upper surface of the electrode pad with a conductive cover film, a relocation wiring is formed. In the Y direction, the width of the relocation wiring positioned directly above the electrode pad is equal to or smaller than the width of the opening formed in the first insulating member.
Public/Granted literature
- US20160133484A1 Method of Manufacturing Semiconductor Device Public/Granted day:2016-05-12
Information query
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