Invention Grant
- Patent Title: Controlled impedance charged device tester
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Application No.: US14303559Application Date: 2014-06-12
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Publication No.: US09726707B1Publication Date: 2017-08-08
- Inventor: Jon E. Barth
- Applicant: Jon E. Barth
- Agency: Kenehan & Lambertsen, Ltd
- Agent John C. Lambertsen
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/12 ; G01R31/28

Abstract:
An ESD tester transforms high speed pulses from s 50-ohm impedance to the optimum lower impedance necessary to simulate the Charged Device Model (“CDM”) test impedance. Direct connections to the device under test eliminates the variations in spark or contact resistance of the present test while transforming the test pulse impedances to the appropriate level. Direct device connections with controlled impedance current paths provide either internal device discharge or external test pulse testing to simulate the original test. The sparkless direct connection controlled impedance transformation is identified by its ability to simulate similar device failures at similar test voltage failure levels.
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