Invention Grant
- Patent Title: Nested cache coherency protocol in a tiered multi-node computer system
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Application No.: US14549429Application Date: 2014-11-20
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Publication No.: US09727464B2Publication Date: 2017-08-08
- Inventor: Garrett Michael Drapala , William J Lewis , Pak-kin Mak , Robert J Sonnelitter, III
- Applicant: Garrett Michael Drapala , William J Lewis , Pak-kin Mak , Robert J Sonnelitter, III
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agent John E. Campbell; Margaret A. McNamara
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0815 ; G06F12/0817 ; G06F12/0806
Abstract:
A computer system comprising multiple nodes, each node comprising a plurality of processors and a local cache hierarchy, suppresses local cache coherency of a node operations or global cache coherency operations between nodes based on the coherency request being a global or local request, and the state of the cache line at the node.
Public/Granted literature
- US20160147659A1 NESTED CACHE COHERENCY PROTOCOL IN A TIERED MULTI-NODE COMPUTER SYSTEM Public/Granted day:2016-05-26
Information query
