This application includes systems and techniques relating to storage devices, such as a device including: a first read channel to process a first input signal obtained from a storage medium using a first read head; a second read channel to process a second input signal obtained from the storage medium using a second read head, which is offset from the first read head in each of two dimensions; a single digital timing loop configured to control interpolation of timing of sampling for first and second analog to digital converters in the first and second read channels; and a two dimensional equalizer coupled with output lines of the first and second read channels; the device being configured to account for a fractional timing difference between the first input signal and the second input signal, the fractional timing difference being a fractional amount of a single clock cycle of the device.