Disclosed herein is a device includes a command generation circuit that activates first and second command signals, an internal circuit that includes a plurality of transistors that are brought into a first operation state when at least one of the first and second command signals is activated, and an output gate circuit that receives a first signal output from the internal circuit, the output gate circuit being configured to pass the first signal when the second command signal is deactivated and to block the first signal when the second command signal is activated.