- Patent Title: Semiconductor structure and memory device including the structure
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Application No.: US14657914Application Date: 2015-03-13
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Publication No.: US09728248B2Publication Date: 2017-08-08
- Inventor: François Tailliet , Marc Battista
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee Address: FR Rousset
- Agency: Slater Matsil, LLP
- Priority: FR1452362 20140321
- Main IPC: G11C11/41
- IPC: G11C11/41 ; G11C11/412 ; G11C14/00 ; G11C16/04 ; H01L27/11

Abstract:
A semiconductor structure includes first and second source/drain region disposed in a semiconductor body and spaced from each other by a channel region. A gate electrode overlies the channel region and a capacitor electrode is disposed between the gate electrode and the channel region. A first gate dielectric is disposed between the gate electrode and the capacitor electrode and a second gate dielectric disposed between the capacitor electrode and the channel region. A first electrically conductive contact region is in electrical contact with the gate electrode and a second electrically conductive contact region in electrical contact with the capacitor electrode. The first and second contact regions are electrically isolated from one another.
Public/Granted literature
- US20150269989A1 Semiconductor Structure and Memory Device including the Structure Public/Granted day:2015-09-24
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