Invention Grant
- Patent Title: Through silicon vias for semiconductor devices and manufacturing method thereof
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Application No.: US14465699Application Date: 2014-08-21
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Publication No.: US09728451B2Publication Date: 2017-08-08
- Inventor: Chen-Chao Wang , Ying-Te Ou
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Stetina Brunda Garred and Brucker
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/48 ; H01L23/522 ; H01L21/302 ; H01L21/48 ; H01L23/00 ; H01L23/495
Abstract:
The present invention provides a semiconductor wafer, a semiconductor chip and a semiconductor package. The semiconductor wafer includes a first pad, a first inter-layer dielectric and a second pad. The first pad is disposed on a top surface of a semiconductor substrate and has a solid portion and a plurality of through holes. The first inter-layer dielectric covers the first pad. The second pad is disposed on the first inter-layer dielectric and has a solid portion and a plurality of through holes, wherein the through holes of the first pad correspond to the solid portion of the second pad.
Public/Granted literature
- US20140363967A1 THROUGH SILICON VIAS FOR SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD THEREOF Public/Granted day:2014-12-11
Information query
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