Invention Grant
- Patent Title: Interconnect etch with polymer layer edge protection
-
Application No.: US14231997Application Date: 2014-04-01
-
Publication No.: US09728518B2Publication Date: 2017-08-08
- Inventor: Roden R. Topacio
- Applicant: Roden R. Topacio
- Applicant Address: CA Markham
- Assignee: ATI Technologies ULC
- Current Assignee: ATI Technologies ULC
- Current Assignee Address: CA Markham
- Agent Timothy M. Honeycutt
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/78 ; H01L21/311

Abstract:
Various semiconductor workpiece polymer layers and methods of fabricating the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a polymer layer to a passivation structure of a semiconductor workpiece where the semiconductor workpiece has first and second semiconductor chips separated by a dicing street. A first opening is patterned in the polymer layer with opposing edges pulled back from the dicing street. A mask is applied over the first opening. A first portion of the passivation structure is etched while using the polymer layer as an etch mask.
Public/Granted literature
- US20150279728A1 INTERCONNECT ETCH WITH POLYMER LAYER EDGE PROTECTION Public/Granted day:2015-10-01
Information query
IPC分类: