Invention Grant
- Patent Title: Integrated circuit packages and methods of forming same
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Application No.: US15425859Application Date: 2017-02-06
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Publication No.: US09728522B2Publication Date: 2017-08-08
- Inventor: An-Jhih Su , Hsien-Wei Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L25/065 ; H01L23/31 ; H01L23/48 ; H01L23/498 ; H01L21/48 ; H01L21/56 ; H01L23/00 ; H01L25/00

Abstract:
Packages and methods of manufacture thereof are described. A package may include a first package and a die structure disposed over the first package. The first package may include: a first encapsulant; a first via structure within the first encapsulant; a first die within the first encapsulant, at least a portion of the first encapsulant being interposed between a sidewall of the first die and a sidewall of the first via structure; a second die within the first encapsulant, an active side of the second die facing an active side of the first die; and a first via chip within the first encapsulant, the first via chip comprising one or more through vias, wherein the first via chip is disposed at the active side of the first die, and between the second die and the first via structure.
Public/Granted literature
- US20170148768A1 INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING SAME Public/Granted day:2017-05-25
Information query
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