- Patent Title: Multi-tier replacement memory stack structure integration scheme
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Application No.: US15015190Application Date: 2016-02-04
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Publication No.: US09728551B1Publication Date: 2017-08-08
- Inventor: Ching-Huang Lu , Zhenyu Lu , Jixin Yu , Daxin Mao , Johann Alsmeier , Wenguang Stephen Shi , Henry Chien
- Applicant: SANDISK TECHNOLOGIES INC.
- Applicant Address: US TX Plano
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Plano
- Agency: The Marbury Law Group PLLC
- Main IPC: H01L29/74
- IPC: H01L29/74 ; H01L29/80 ; H01L29/792 ; H01L21/00 ; H01L21/336 ; H01L27/11582 ; H01L27/11556 ; H01L27/11519 ; H01L27/11565 ; H01L23/528 ; H01L23/522 ; H01L29/788 ; H01L29/04 ; H01L21/28 ; H01L21/225 ; H01L21/30 ; H01L21/02 ; H01L27/11524 ; H01L27/1157

Abstract:
A memory opening can be formed through a multiple tier structure. Each tier structure includes an alternating stack of sacrificial material layers and insulating layers. After formation of a dielectric oxide layer, the memory opening is filled with a sacrificial memory opening fill structure. The sacrificial material layers are removed selective to the insulating layers and the dielectric oxide layer to form backside recesses. Physically exposed portions of the dielectric oxide layer are removed. A backside blocking dielectric and electrically conductive layers are formed in the backside recesses. Subsequently, the sacrificial memory opening fill structure is replaced with a memory stack structure including a plurality of charge storage regions and a semiconductor channel. Hydrogen or deuterium from a dielectric core may then be outdiffused into the semiconductor channel.
Public/Granted literature
- US20170229472A1 MULTI-TIER REPLACEMENT MEMORY STACK STRUCTURE INTEGRATION SCHEME Public/Granted day:2017-08-10
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