Invention Grant
- Patent Title: Semiconductor memory device having voids between word lines and a source line
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Application No.: US15205481Application Date: 2016-07-08
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Publication No.: US09728552B1Publication Date: 2017-08-08
- Inventor: Atsushi Fukumoto , Fumiki Aiso , Hajime Nagano
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L29/792 ; H01L29/423 ; H01L21/28 ; H01L29/51 ; H01L29/788 ; H01L23/522 ; H01L27/11582 ; H01L27/11565 ; H01L27/11568 ; H01L27/105

Abstract:
According to an embodiment, a semiconductor memory device includes first and second stacked bodies, first and second memory parts, and an insulating part. The first stacked body includes first conductive layers and first insulating layers alternately arranged in a first direction. The second stacked body includes second conductive layers and second insulating layers alternately arranged in the first direction. The first and second memory parts extend through the first and second stacked body in the first direction, respectively. The insulating part is provided between the first and second stacked bodies. The insulating part includes a first oxygen-containing film including silicon and oxygen, and a nitrogen-containing film including silicon and nitrogen. The first oxygen-containing film is provided between at least one of first conductive layers and the nitrogen-containing film. The first oxygen-containing film has a hole.
Public/Granted literature
- US20170229473A1 SEMICONDUCTOR MEMORY DEVICE HAVING VOIDS BETWEEN WORD LINES AND A SOURCE LINE Public/Granted day:2017-08-10
Information query
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