- Patent Title: Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, GATE-short-configured, and TS-short-configured, NCEM-enabled fill cells
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Application No.: US15371955Application Date: 2016-12-07
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Publication No.: US09728553B1Publication Date: 2017-08-08
- Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
- Applicant: PDF Solutions, Inc.
- Applicant Address: US CA San Jose
- Assignee: PDF Solutions, Inc.
- Current Assignee: PDF Solutions, Inc.
- Current Assignee Address: US CA San Jose
- Agent David Garrod
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L27/02 ; H01L27/118 ; H01L23/528 ; H01L23/522 ; H01L29/45 ; G01R31/28
Abstract:
An IC includes logic cells, selected from a standard cell library, and fill cells, configured for compatibility with the standard logic cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The IC includes such NCEM-enabled fill cells configured to enable detection and/or measurement of a variety of open-circuit and short-circuit failure modes, including at least one via-open-related failure mode, one AACNT-short-related failure mode, one GATE-short-related failure mode, and one TS-short-related failure mode.
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