Invention Grant
- Patent Title: Three dimensional memory array with select device
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Application No.: US13915302Application Date: 2013-06-11
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Publication No.: US09728584B2Publication Date: 2017-08-08
- Inventor: D. V. Nirmal Ramaswamy , Scott E. Sills , Gurtej S. Sandhu
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00 ; H01L27/11578

Abstract:
Three dimensional memory arrays and methods of forming the same are provided. An example three dimensional memory array can include a stack comprising a plurality of first conductive lines separated from one another by at least an insulation material, and at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines such that the at least one conductive extension intersects each of the plurality of first conductive lines. Storage element material is arranged around the at least one conductive extension, and a select device is arranged around the storage element material. The storage element material is radially adjacent an insulation material separating the plurality of first conductive lines, and the plurality of materials arranged around the storage element material are radially adjacent each of the plurality of first conductive lines.
Public/Granted literature
- US20140361239A1 THREE DIMENSIONAL MEMORY ARRAY WITH SELECT DEVICE Public/Granted day:2014-12-11
Information query
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