Invention Grant
- Patent Title: Semiconductor devices having a spacer on an isolation region
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Application No.: US14974018Application Date: 2015-12-18
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Publication No.: US09728643B2Publication Date: 2017-08-08
- Inventor: Byungjae Park , Heonjong Shin , Hagju Cho , Kyounghwan Yeo
- Applicant: Byungjae Park , Heonjong Shin , Hagju Cho , Kyounghwan Yeo
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2015-0046420 20150401
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/417 ; H01L29/66
Abstract:
A semiconductor device including a fin active region protruding from a substrate and an isolation region defining the fin active region, a gate pattern intersecting the fin active region and the isolation region, and gate spacer formed on a side surface of the gate pattern and extending onto a surface of the isolation region is provided.
Public/Granted literature
- US20160293749A1 SEMICONDUCTOR DEVICES HAVING A SPACER ON AN ISOLATION REGION Public/Granted day:2016-10-06
Information query
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