Invention Grant
- Patent Title: Semiconductor device including embedded crystalline back-gate bias planes, related design structure and method of fabrication
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Application No.: US15009906Application Date: 2016-01-29
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Publication No.: US09728649B2Publication Date: 2017-08-08
- Inventor: Thomas N. Adam , Kangguo Cheng , Ali Khakifirooz , Alexander Reznicek , Raghavasimhan Sreenivasan
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent David Cain
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L21/28 ; H01L21/84 ; H01L27/12 ; H01L29/06 ; H01L29/423
Abstract:
A semiconductor device is disclosed. The semiconductor device can include a first dielectric layer disposed on a substrate; a set of bias lines disposed on the first dielectric layer; a second dielectric layer disposed on the first dielectric layer and between the set of bias lines, wherein a thickness of the second dielectric layer is less than a thickness of the first dielectric layer; a patterned semiconductor layer disposed on portions of the second dielectric layer; and a set of devices disposed on the patterned semiconductor layer above the set of bias lines.
Public/Granted literature
Information query
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