A display panel assembly according to an exemplary embodiment of the present disclosure includes: an upper mother substrate; a lower mother substrate disposed opposing the upper mother substrate and including a plurality of thin film transistor (TFT) arrays; a sealing member formed between the upper mother substrate and the lower mother substrate and formed with a closed loop shape to surround the thin film transistor array; and a seal pattern formed on an edge region of the upper mother substrate and the lower mother substrate to bond the upper mother substrate and the lower mother substrate and in which an open region is formed to connect the inside and outside of the bonded upper mother substrate and lower mother substrate.