Invention Grant
- Patent Title: Circuit arrangement and method for controlling semiconductor switching element
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Application No.: US14712128Application Date: 2015-05-14
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Publication No.: US09729136B2Publication Date: 2017-08-08
- Inventor: Christian Magerl , Benjamin Schranz , Jan Herndler , Andreas Hoegl
- Applicant: FRONIUS INTERNATIONAL GmbH
- Applicant Address: AT Pettenbach
- Assignee: FRONIUS INTERNATIONAL GmbH
- Current Assignee: FRONIUS INTERNATIONAL GmbH
- Current Assignee Address: AT Pettenbach
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: ATA50341/2014 20140515
- Main IPC: H03K17/567
- IPC: H03K17/567 ; H03K17/687 ; H03K17/61 ; H03K17/691 ; H03K17/16

Abstract:
In order to reduce the problems with sharp-edged control voltages of semiconductor switching elements, it is provided that the control terminal (6) of the semiconductor switching element (1) is connected to the output terminal (7) of the semiconductor switching element (1) via a ramp generation unit (5), and the ramp generation unit (5) flattens the sharply ascending and descending edges of the driver control voltage (VS) into the form of a ramp, in order to generate a transistor control voltage (VG) at the output of the ramp generation unit (5).
Public/Granted literature
- US20150333749A1 CIRCUIT ARRANGEMENT AND METHOD FOR CONTROLLING SEMICONDUCTOR SWITCHING ELEMENT Public/Granted day:2015-11-19
Information query
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