Invention Grant
- Patent Title: Semiconductor circuit, voltage detection circuit, and voltage determination circuit
-
Application No.: US14936167Application Date: 2015-11-09
-
Publication No.: US09729137B2Publication Date: 2017-08-08
- Inventor: Takashi Takemura
- Applicant: LAPIS SEMICONDUCTOR CO., LTD.
- Applicant Address: JP Yokohama
- Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee Address: JP Yokohama
- Agency: Volentine & Whitt, PLLC
- Priority: JP2014-229257 20141111; JP2015-058521 20150320
- Main IPC: H03L7/00
- IPC: H03L7/00 ; H03K17/22

Abstract:
The present disclosure provides a semiconductor circuit including: a PMOS transistor that includes a first source connected to a power supply, a first drain, and a first gate to which a fixed potential is supplied; an output circuit that outputs a first output signal, which is a reset signal or a power-on signal, and that outputs a second output signal according to a potential of the first drain; a constant current source connected to the first drain; and an NMOS transistor that includes a second source to which a fixed potential is supplied, a second drain connected to the first drain, and a second gate to which the second output signal from the output circuit is applied.
Public/Granted literature
- US20160134274A1 SEMICONDUCTOR CIRCUIT, VOLTAGE DETECTION CIRCUIT, AND VOLTAGE DETERMINATION CIRCUIT Public/Granted day:2016-05-12
Information query