In one aspect, one or more processors may be coupled to a content-addressable memory, a first memory and a second memory. The one or more processors may be configured to receive a data packet, read a predetermined number of bytes from the data packet, and match the read bytes to patterns corresponding to rows of the content-addressable memory. Further, the one or more processors may determine a number associated with the matched row, and based on the number, determine an initial routing instruction. The one or more processors may then determine which bits of the read bytes to hash using hash information stored in the first memory, hash the bits to generate a hash value, determine whether the value corresponds to routing information in the second memory, and route the data packet based on the routing information.