Invention Grant
- Patent Title: Methods of forming NMOS and PMOS FinFET devices and the resulting product
-
Application No.: US14608902Application Date: 2015-01-29
-
Publication No.: US09741622B2Publication Date: 2017-08-22
- Inventor: Ajey Poovannummoottil Jacob
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/66 ; H01L21/265 ; H01L29/165

Abstract:
One illustrative method disclosed herein includes, among other things, recessing first and second fins to define replacement fin cavities in a layer of insulating material, forming an initial strain relaxed buffer layer such that it only partially fills the replacement fin cavities, implanting carbon into the initial strain relaxed buffer layer in the NMOS region, forming a channel semiconductor material on the initial strain relaxed buffer layer within the replacement fin cavities in both the NMOS region and the PMOS region to thereby define an NMOS fin comprised of the channel semiconductor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of the channel semiconductor material and the initial strain relaxed buffer layer and forming gate structures for the NMOS and PMOS devices.
Public/Granted literature
- US20160225674A1 METHODS OF FORMING NMOS AND PMOS FINFET DEVICES AND THE RESULTING PRODUCT Public/Granted day:2016-08-04
Information query
IPC分类: