A non-volatile inverter may be configured to perform a memory function. The non-volatile inverter may include first and second transistors. The first transistor may include a first gate electrode, a first electrode, and a second electrode. The second transistor may include a second gate electrode and a third electrode and may share the second electrode with the first transistor. The first transistor may include a first switching layer and a charge trap layer. The first switching layer may be configured to switch between a high resistance state and a low resistance state. The charge trap layer may be configured to trap or de-trap charges according to the resistance state of the first switching layer. The first switching layer may include a P-N diode. The second transistor may include a second gate switching layer and a charge trap layer.