Invention Grant
- Patent Title: Resistive ratio-based memory cell
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Application No.: US15111194Application Date: 2014-01-31
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Publication No.: US09754666B2Publication Date: 2017-09-05
- Inventor: Brent E. Buchanan , Martin Foltin , Jeffrey A. Lucas , Clinton H. Parker
- Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Applicant Address: US TX Houston
- Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee Address: US TX Houston
- Agency: Trop, Pruner & Hu, P.C.
- International Application: PCT/US2014/014051 WO 20140131
- International Announcement: WO2015/116144 WO 20150806
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C13/00

Abstract:
An apparatus includes a first resistive storage element and a second resistive storage element. The first and second resistive storage elements are coupled to column lines to of a crosspoint array to form a memory cell; and a ratio of resistances of the first and second resistive storage elements indicates a stored value for the memory cell.
Public/Granted literature
- US20160336063A1 RESISTIVE RATIO-BASED MEMORY CELL Public/Granted day:2016-11-17
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