The present invention provides a CMOS GOA circuit. The first NOR gate (Y1) and the second NOR gate (Y2) are located in the input control module (1). The two input ends of the first NOR gate (Y1) respectively receives the stage transfer signal (Q(N−1)) of the GOA unit circuit of the former stage and the global signal (Gas), and the two input ends of the second NOR gate (Y2) respectively receives the first clock signal (CK1) and the global signal (Gas). When the global signal (Gas) is high voltage level, the all the scan driving signals (G(N)) of the respective stages are controlled to be raised up to high voltage levels at the same time, and meanwhile, both the first NOR gate (Y1) and the second NOR gate (Y2) are controlled to output low voltage levels to control the inverted stage transfer signal (XQ(N)) to be high voltage level.