A thin film transistor (TFT) array substrate is disclosed and having a pixel region and a peripheral region surrounding the pixel region, and the pixel region comprises horizontal gate lines, longitudinal data lines defining pixel units with the horizontal gate lines, and storage capacitor electrode (Vcom) lines. The peripheral region comprises at least one peripheral common electrode line which is electrically connected with an integrated-circuit (IC) element. The Vcom lines are connected with the peripheral common electrode line through one or more Vcom line IC terminals.