Invention Grant
- Patent Title: Semiconductor device and method of making embedded wafer level chip scale packages
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Application No.: US14139312Application Date: 2013-12-23
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Publication No.: US09768038B2Publication Date: 2017-09-19
- Inventor: Yaojian Lin
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Pte. Ltd.
- Current Assignee: STATS ChipPAC, Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/31 ; H01L23/00

Abstract:
A semiconductor device includes a carrier and a plurality of semiconductor die disposed over the carrier. An encapsulant is deposited over the semiconductor die. A composite layer is formed over the encapsulant to form a panel. The carrier is removed. A conductive layer is formed over the panel. An insulating layer is formed over the conductive layer. The carrier includes a glass layer, a second composite layer formed over the glass layer, and an interface layer formed over the glass layer. The composite layer and encapsulant are selected to tune a coefficient of thermal expansion of the panel. The panel includes panel blocks comprising an opening separating the panel blocks. The encapsulant or insulating material is deposited in the opening. A plurality of support members are disposed around the panel blocks. An interconnect structure is formed over the conductive layer.
Public/Granted literature
- US20150179481A1 Semiconductor Device and Method of Making Embedded Wafer Level Chip Scale Packages Public/Granted day:2015-06-25
Information query
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