Invention Grant
- Patent Title: Multi-granular cache coherence
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Application No.: US14437331Application Date: 2012-10-25
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Publication No.: US09772950B2Publication Date: 2017-09-26
- Inventor: Yan Solihin
- Applicant: Empire Technology Development LLC
- Applicant Address: US DE Wilmington
- Assignee: EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Current Assignee: EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Current Assignee Address: US DE Wilmington
- Agency: Moritt Hock & Hamroff LLP
- Agent Steven S. Rubin, Esq.
- International Application: PCT/US2012/061907 WO 20121025
- International Announcement: WO2014/065802 WO 20140501
- Main IPC: G06F12/0897
- IPC: G06F12/0897 ; G06F12/0813 ; G06F12/0815 ; G06F12/0817

Abstract:
Technologies are generally described for methods and systems effective to maintain coherence in a multi-core processor on a die. In an example, a method for processing a request for a particular block in a particular region may include analyzing, by a first processor, a first cache to determine whether there is a block indicator in the first cache associated with the particular block. The method may further include when the first processor determines that the block indicator is not present in the first cache, analyzing, by the first processor, the first cache to determine whether there is a region indicator associated with the particular region. The method may further include when the first processor determines that the region indicator is not present in the first cache, the method further includes sending, by the first processor, the request to the directory in the tile.
Public/Granted literature
- US20150286577A1 MULTI-GRANULAR CACHE COHERENCE Public/Granted day:2015-10-08
Information query
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