Invention Grant
- Patent Title: Reducing antenna effects in SOI devices
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Application No.: US15049572Application Date: 2016-02-22
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Publication No.: US09773811B2Publication Date: 2017-09-26
- Inventor: Ingolf Lorenz , Stefan Block , Ulrich Hensel , Jürgen Faul , Michael Zier , Haritez Narisetty
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L23/62 ; H01L21/00 ; H01L21/84 ; H01L21/8234 ; H01L27/02 ; H01L29/66

Abstract:
It is provided a semiconductor device comprising a power line, a Silicon-on-Insulator, SOI, substrate comprising a semiconductor layer and a semiconductor bulk substrate comprising a first doped region, a first transistor device formed in and above the SOI substrate and comprising a first gate dielectric formed over the semiconductor layer and a first gate electrode formed over the gate dielectric, a first diode electrically connected to the first gate electrode and a second diode electrically connected to the first diode and the power line; and wherein the first and second diodes are partially formed in the first doped region.
Public/Granted literature
- US20170243894A1 REDUCING ANTENNA EFFECTS IN SOI DEVICES Public/Granted day:2017-08-24
Information query
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