Invention Grant
- Patent Title: Modulating processsor core operations
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Application No.: US14854787Application Date: 2015-09-15
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Publication No.: US09779058B2Publication Date: 2017-10-03
- Inventor: Luiz Andre Barroso
- Applicant: Google Inc.
- Applicant Address: US CA Mountain View
- Assignee: Google Inc.
- Current Assignee: Google Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fish & Richardson P.C.
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/26 ; G06F9/00 ; G06F15/80 ; G06F9/50

Abstract:
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for reducing processor latency through the use of dedicated cores. In one aspect, a method includes a multi-core processor having n cores, including, selecting k cores of the n cores of the multi-core processor to perform dedicated low-latency operations for the n-core processor, where k is less than n, m cores are unselected, and each core of the multi-core processor has a rated core capacity. The methods operate the selected k cores at less than the rated core capacity such that k cores are collectively underutilized by an underutilized capacity and operate one or more of the m cores at a capacity in excess of the rated core capacity such that the m cores operate at a collective capacity that exceeds a collective capacity of the rated core capacities of the m cores.
Public/Granted literature
- US20170017611A1 MODULATING PROCESSSOR CORE OPERATIONS Public/Granted day:2017-01-19
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