A graphics processing pipeline (20) comprises first vertex shading circuitry (21) that operates to vertex shade position attributes of vertices of a set of vertices to be processed by the graphics processing pipeline. Tiling circuitry (22) then determines for the vertices that have been subjected to the first vertex shading operation, whether the vertices should be processed further. A second vertex shading circuitry (23) then performs a second vertex shading operation on the vertices that it has been determined should be processed further, to vertex shade the remaining vertex attributes for each vertex that it has been determined should be processed further.