A method includes using a first tracking circuit corresponding to a first set of access ports of a memory macro to cause a signal transition of a first tracking signal based on an edge of a clock signal. Using a second tracking circuit corresponding to a second set of access ports of the memory macro, a signal transition of a second tracking signal is caused based on the edge of the clock signal. A reset signal is generated based on the signal transition of the first tracking signal and the signal transition of the second tracking signal. A read operation or a write operation on the memory macro is performed based on the edge of the clock signal and the reset signal.