Invention Grant
- Patent Title: Methods for providing redundancy in a memory array comprising mapping portions of data associated with a defective address
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Application No.: US14940327Application Date: 2015-11-13
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Publication No.: US09779839B2Publication Date: 2017-10-03
- Inventor: Violante Moschiano , Giovanni Santin , Maria-Luisa Gallese , Luigi Pilolli
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C7/00 ; G11C16/04

Abstract:
Methods for providing redundancy in a memory include mapping a portion of first data associated with an address of the memory determined to indicate a defective memory cell to an address of a redundant area of the memory array, and writing second data to the memory array, wherein a portion of the second data is written to a column of the memory array associated with the address of the memory determined to indicate a defective memory cell for the first data.
Public/Granted literature
- US20160071619A1 METHODS AND APPARATUS FOR PROVIDING REDUNDANCY IN MEMORY Public/Granted day:2016-03-10
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