Compact impedance transformer
Abstract:
A compact impedance transformer is disclosed having a first dielectric substrate, a first planar conductor disposed on a top surface of the first dielectric substrate in a loop, a second planar conductor disposed on a bottom surface of the first dielectric substrate in a second loop, wherein the first planar conductor and the second planar conductor are substantially identical and in stacked alignment. A second dielectric substrate has a third planar conductor disposed on a top surface of the second dielectric substrate in a third loop, and a fourth planar conductor disposed on a bottom surface of the second dielectric substrate in a fourth loop, wherein the third planar conductor and the fourth planar conductor are substantially identical and in stacked alignment. An interconnect structure between terminals of the first planar conductor, the second planar conductor, the third planar conductor, and the fourth planar conductor provide impedance transformations.
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