Invention Grant
- Patent Title: Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit
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Application No.: US15466396Application Date: 2017-03-22
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Publication No.: US09780045B2Publication Date: 2017-10-03
- Inventor: Pascal Fornara , Christian Rivero , Guilhem Bouton
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1458099 20140829
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L27/02 ; H01L21/768
Abstract:
An integrated circuit includes a substrate with several functional blocks formed thereon. At least two identical functional blocks are respectively disposed at two or more different locations on the integrated circuit. Electrically inactive dummy modules in the neighborhoods and/or inside of the functional blocks are provided, wherein at least two different electrically inactive dummy modules are includes in the respective neighborhoods and/or inside of the at least two identical functional blocks.
Public/Granted literature
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