Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US14518126Application Date: 2014-10-20
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Publication No.: US09780225B2Publication Date: 2017-10-03
- Inventor: Shunpei Yamazaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2010-293047 20101228
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/12 ; H01L29/04 ; H01L31/036 ; H01L29/76 ; H01L31/112 ; H01L21/00 ; H01L21/16 ; H01L21/336 ; H01L29/786 ; G11C11/403 ; H01L27/108 ; H01L27/11 ; H01L27/1156 ; H01L27/12 ; H01L29/24 ; G11C16/04 ; H01L21/02
Abstract:
A semiconductor device capable of high speed operation is provided. Further, a semiconductor device in which change in electric characteristics due to a short channel effect is hardly caused is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed by self-aligned process in which one or more elements selected from Group 15 elements are added to the semiconductor layer with the use of a gate electrode as a mask. The source region and the drain region can have a wurtzite crystal structure.
Public/Granted literature
- US09570623B2 Semiconductor device and manufacturing method thereof Public/Granted day:2017-02-14
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