Invention Grant
- Patent Title: Managing disturbance induced errors
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Application No.: US14938221Application Date: 2015-11-11
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Publication No.: US09792963B2Publication Date: 2017-10-17
- Inventor: Prashant S. Damle , Frank T. Hady , Paul D. Ruby , Kiran Pangal , Sowmiya Jayachandran
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G11C11/406
- IPC: G11C11/406 ; G11C7/10 ; G11C16/34

Abstract:
In an embodiment, a memory controller may determine that one or more neighboring memory cells associated with a target memory cell in a memory device are to be refreshed. The controller may generate a command associated with refreshing the one or more neighboring memory cells. The controller may transfer the command from the memory controller to the memory device containing the target memory cell. The command may direct the memory device to refresh the neighboring memory cells and/or return one or more addresses associated with the neighboring memory cells.
Public/Granted literature
- US20160189757A1 MANAGING DISTURBANCE INDUCED ERRORS Public/Granted day:2016-06-30
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