Invention Grant
- Patent Title: Buried source-drain contact for integrated circuit transistor devices and method of making same
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Application No.: US15179620Application Date: 2016-06-10
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Publication No.: US09793171B2Publication Date: 2017-10-17
- Inventor: Qing Liu , Ruilong Xie , Chun-Chen Yeh , Xiuyu Cai , William J. Taylor
- Applicant: International Business Machines Corporation , GLOBALFOUNDRIES INC. , STMICROELECTRONICS, INC.
- Applicant Address: US NY Armonk KY Grand Cayman US TX Coppell
- Assignee: International Business Machines Corporation,GLOBALFOUNDRIES INC.,STMICROELECTRONICS, INC.
- Current Assignee: International Business Machines Corporation,GLOBALFOUNDRIES INC.,STMICROELECTRONICS, INC.
- Current Assignee Address: US NY Armonk KY Grand Cayman US TX Coppell
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Steven J. Meyers
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234 ; H01L29/417 ; H01L29/78 ; H01L29/66 ; H01L21/84 ; H01L27/12 ; H01L21/285
Abstract:
An integrated circuit transistor is formed on a substrate. A trench in the substrate is at least partially filled with a metal material to form a source (or drain) contact buried in the substrate. The substrate further includes a source (or drain) region in the substrate which is in electrical connection with the source (or drain) contact. The substrate further includes a channel region adjacent to the source (or drain) region. A gate dielectric is provided on top of the channel region and a gate electrode is provided on top of the gate dielectric. The substrate may be of the silicon on insulator (SOI) or bulk type. The buried source (or drain) contact makes electrical connection to a side of the source (or drain) region using a junction provided at a same level of the substrate as the source (or drain) and channel regions.
Public/Granted literature
- US20160284599A1 BURIED SOURCE-DRAIN CONTACT FOR INTEGRATED CIRCUIT TRANSISTOR DEVICES AND METHOD OF MAKING SAME Public/Granted day:2016-09-29
Information query
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