Invention Grant
- Patent Title: Insulated gate bipolar transistor structure having low substrate leakage
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Application No.: US15191745Application Date: 2016-06-24
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Publication No.: US09793385B2Publication Date: 2017-10-17
- Inventor: Ker-Hsiao Huo , Fu-Chih Yang , Jen-Hao Yeh , Chun Lin Tsai , Chih-Chang Cheng , Ru-Yi Su
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/739 ; H01L21/265 ; H01L21/762 ; H01L29/78 ; H01L29/08 ; H01L29/49 ; H01L29/423 ; H01L29/06 ; H01L29/10

Abstract:
A high voltage metal-oxide-semiconductor laterally diffused device (HV LDMOS), and more particularly an insulated gate bipolar junction transistor (IGBT), is disclosed. The device includes a semiconductor substrate, a gate structure formed on the substrate, a source and a drain formed in the substrate on either side of the gate structure, a first doped well formed in the substrate, and a second doped well formed in the first well. The gate, source, second doped well, a portion of the first well, and a portion of the drain structure are surrounded by a deep trench isolation feature and an implanted oxygen layer in the silicon substrate.
Public/Granted literature
- US20160308036A1 Insulated Gate Bipolar Transistor Structure Having Low Substrate Leakage Public/Granted day:2016-10-20
Information query
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