Invention Grant
- Patent Title: Method of fabricating semiconductor package having semiconductor element
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Application No.: US15074110Application Date: 2016-03-18
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Publication No.: US09812340B2Publication Date: 2017-11-07
- Inventor: Chiang-Cheng Chang , Meng-Tsung Lee , Jung-Pang Huang , Shih-Kuang Chiu , Fu-Tang Huang
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW101125979A 20120719
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/56 ; H01L23/00 ; H01L21/683 ; H01L21/768 ; H01L23/31

Abstract:
A method of fabricating a semiconductor package is provided, including: disposing a plurality of semiconductor elements on a carrier through an adhesive layer in a manner that a portion of the carrier is exposed from the adhesive layer; forming an encapsulant to encapsulate the semiconductor elements; removing the adhesive layer and the carrier to expose the semiconductor elements; and forming a build-up structure on the semiconductor elements. Since the adhesive layer is divided into a plurality of separated portions that will not affect each other due to expansion or contraction when temperature changes, the present invention prevents positional deviations of the semiconductor elements during a molding process, thereby increasing the alignment accuracy.
Public/Granted literature
- US20160196990A1 METHOD OF FABRICATING SEMICONDUCTOR PACKAGE Public/Granted day:2016-07-07
Information query
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