Invention Grant
- Patent Title: Third tap circuitry controlling linking first and second tap circuitry
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Application No.: US15134877Application Date: 2016-04-21
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Publication No.: US09817070B2Publication Date: 2017-11-14
- Inventor: Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Vij
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: G01R31/3177
- IPC: G01R31/3177 ; G01R31/3185 ; G01R31/317

Abstract:
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.
Public/Granted literature
- US20160231380A1 THIRD TAP CIRCUITRY CONTROLLING LINKING FIRST AND SECOND TAP CIRCUITRY Public/Granted day:2016-08-11
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