Invention Grant
- Patent Title: Semiconductor apparatus reducing a parasitic capacitance
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Application No.: US15047864Application Date: 2016-02-19
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Publication No.: US09859892B2Publication Date: 2018-01-02
- Inventor: Sun Ki Cho
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2015-0099380 20150713
- Main IPC: H03K3/01
- IPC: H03K3/01 ; H03K19/0185
Abstract:
A semiconductor apparatus may include a transmission circuit, a reception circuit, and a pad commonly coupled to the transmission circuit and the reception circuit. When either the transmission circuit or the reception circuit is activated, parasitic capacitance of a line coupled to the transmission circuit, the reception circuit, and the pad is varied.
Public/Granted literature
- US20170019107A1 SEMICONDUCTOR APPARATUS Public/Granted day:2017-01-19
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