- 专利标题: System and method for modeling electronic circuit designs
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申请号: US14973064申请日: 2015-12-17
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公开(公告)号: US09864827B1公开(公告)日: 2018-01-09
- 发明人: Jilin Tan , Jian Chen , Jian Liu , An-Yu Kuo , Tiejun Yu
- 申请人: Cadence Design Systems, Inc.
- 申请人地址: US CA San Jose
- 专利权人: Cadence Design Systems, Inc.
- 当前专利权人: Cadence Design Systems, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Holland & Knight LLP
- 代理商 Mark H. Whittenberger, Esq.
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
The present disclosure relates to a system and method for modeling an electronic circuit design. Embodiments may include receiving, at one or more computing devices, an electronic circuit design. Embodiments may also include partitioning, at a graphical user interface configured to display at least a portion of the electronic circuit design, at least one portion of the electronic circuit design into one or more sub-zones and generating, at the graphical user interface, one or more ports at each interface between one or more sub-zones. Embodiments may further include receiving a selection for an electromagnetic (EM) solver for each of the one or more sub-zones. Embodiments may also include modeling each of the one or more sub-zones.
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