- 专利标题: Phase locked loop with sense amplifier circuitry
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申请号: US15419587申请日: 2017-01-30
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公开(公告)号: US09871527B2公开(公告)日: 2018-01-16
- 发明人: David M. Friend , Grant P. Kesselring , Michael A. Sperling , James D. Strom
- 申请人: International Business Machines Corporation
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 代理机构: Patterson + Sheridan, LLP
- 主分类号: H03L7/093
- IPC分类号: H03L7/093 ; H03L7/099 ; H02M3/07 ; H03F3/45
摘要:
A phase-locked loop (PLL) circuit, sense amplifier circuit, and method of operating a sense amplifier circuit are disclosed. The sense amplifier circuit comprises first and second operational amplifiers, each operational amplifier respectively comprising a non-inverting input terminal, an inverting input terminal, and an output stage comprising a current gating circuit having two current gating input terminals, the output stage coupled with an output terminal, the output terminal providing a feedback signal to the inverting input terminal. The input voltage signal is received across the non-inverting input terminals of the first and second operational amplifiers, and is received across the two current gating input terminals of each of the first and second operational amplifiers, wherein the sense amplifier circuit generates a sense voltage signal across the output terminals of the first and second operational amplifiers.
公开/授权文献
- US20170141781A1 LOW POWER AMPLIFIER 公开/授权日:2017-05-18
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