The present disclosure provides an array substrate comprising a plurality of data lines and a plurality of groups of gate lines, a display panel comprising the array substrate, a display device comprising the display panel and an electronic device comprising the display device. The plurality of data lines and the plurality of groups of gate lines intersect each other for dividing the array substrate into a plurality of pixel units. Each group of gate lines defines a row of a plurality of pixel units and comprises a first gate line and a second gate line. Each pixel unit comprises a first pixel electrode and a second pixel electrode, the first pixel electrode corresponds to the second gate line and the second pixel electrode corresponds to the first gate line. Each pixel unit comprises a first repair unit electrically coupled to the first pixel electrode and forming a first repair capacitance with the first gate line, and a second repair unit electrically coupled to the second pixel electrode and forming a second repair capacitance with the second gate line. Each pixel unit further comprises a main compensating unit electrically coupled to the first pixel electrode and forming a compensation capacitance with the second gate line.