An electronic device and method in which a tuning process is performed during memory initialization, so as to reduce the occurrence of data read errors. The device may include a clock generator that generates a clock signal transmitted to a memory device, and a host control module that transmits to the memory device a change signal changing at least a portion of the clock signal, and/or a tuning related command. The host control module may receive setting data from the memory device, corresponding to at least one of the change signal and the tuning related command.