Invention Grant
- Patent Title: Methods and apparatus for fusing instructions to provide OR-test and AND-test functionality on multiple test sources
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Application No.: US13842754Application Date: 2013-03-15
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Publication No.: US09886277B2Publication Date: 2018-02-06
- Inventor: Maxim Loktyukhin , Robert Valentine , Julian C. Horn , Mark J. Charney
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F7/38 ; G06F9/00 ; G06F9/44 ; G06F9/30 ; G06F9/45 ; G06F9/455

Abstract:
Methods and apparatus are disclosed for fusing instructions to provide OR-test and AND-test functionality on multiple test sources. Some embodiments include fetching instructions, said instructions including a first instruction specifying a first operand destination, a second instruction specifying a second operand source, and a third instruction specifying a branch condition. A portion of the plurality of instructions are fused into a single micro-operation, the portion including both the first and second instructions if said first operand destination and said second operand source are the same, and said branch condition is dependent upon the second instruction. Some embodiments generate a novel test instruction dynamically by fusing one logical instruction with a prior-art test instruction. Other embodiments generate the novel test instruction through a just-in-time compiler. Some embodiments also fuse the novel test instruction with a subsequent conditional branch instruction, and perform a branch according to how the condition flag is set.
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