Invention Grant
- Patent Title: Wiring board including multiple wiring layers that are different in surface roughness
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Application No.: US15244197Application Date: 2016-08-23
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Publication No.: US09911695B2Publication Date: 2018-03-06
- Inventor: Toyoaki Sakai
- Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Applicant Address: JP Nagano
- Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee Address: JP Nagano
- Agency: IPUSA, PLLC
- Priority: JP2015-197091 20151002
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/528 ; H01L23/532 ; H01L23/498 ; H01L21/48 ; H01L25/10

Abstract:
A wiring board includes an insulating layer, a first wiring layer, and a second wiring layer. The first wiring layer is formed in a first surface of the insulating layer, and includes a pad on which a semiconductor chip is to be mounted and a wiring pattern. The second wiring layer is formed on a second surface of the insulating layer opposite to the first surface. The roughness of a surface of the first wiring layer exposed at the first surface of the insulating layer is smaller than the roughness of a surface of the second wiring layer exposed on the second surface of the insulating layer.
Public/Granted literature
- US20170098600A1 WIRING BOARD Public/Granted day:2017-04-06
Information query
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