- 专利标题: Sort-and delay methods for time-to-digital conversion
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申请号: US15706732申请日: 2017-09-17
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公开(公告)号: US09912344B1公开(公告)日: 2018-03-06
- 发明人: Mikko Waltari
- 申请人: IQ-Analog Corporation
- 申请人地址: US CA San Diego
- 专利权人: IQ-Analog Corp.
- 当前专利权人: IQ-Analog Corp.
- 当前专利权人地址: US CA San Diego
- 代理机构: Law Office of Gerald Maliszewski
- 代理商 Gerald Maliszewski
- 主分类号: H03M1/12
- IPC分类号: H03M1/12 ; H03M1/44 ; H03M1/06
摘要:
A sort-and-delay time-to-digital converter (TDC) is provided, made up of a plurality of serially connected sort-and-delay circuits. Each sort-and-delay circuit accepts a time-differential input signal with a first edge separated from a second edge by an input duration of time. The first and second edges are selectively routed as a time-differential output signal with a delayed edge separated from a trailing edge by an output duration of time representing a compression of the input duration of time. Each sort-and-delay circuit also supplies a TDC coded bit (e.g., Gray code) indicating the order in which the first and second edges are routed as leading and trailing edges. The TDC outputs a digital output signal representing the initial input duration of time associated with the initial time-differential input signal received by the initial sort-and-delay circuit. Associated TDC, sort-and-delay, and time amplification methods are also provided.
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