Trench liner passivation for dark current improvement
Abstract:
A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes a bottom portion and a top portion. The bottom portion has a lining oxide layer, a negatively-charged liner and a first silicon oxide. The lining oxide layer is peripherally enclosed by the semiconductor substrate, the negatively-charged liner is peripherally enclosed by the lining oxide layer, and the first silicon oxide is peripherally enclosed by the negatively-charged liner. The top portion adjoins the bottom portion, and has a second silicon oxide peripherally enclosed by and contacting the semiconductor substrate.
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